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?001 fairchild semiconductor corporation isl9g1260eg3, ISL9G1260EP3, isl9g1260es3 rev. a file number 5019 isl9g1260eg3, ISL9G1260EP3, isl9g1260es3 600v, smps ii lgc series n-channel igbt the isl9g1260eg3, ISL9G1260EP3 and isl9g1260es3 are low gate charge (lgc) smps ii igbts combining the fast switching speed of the smps igbts with lower gate charge and avalanche capability (uis). these lgc devices shorten delay times, and reduce the power requirement of the gate drive. these devices are ideally suited for high voltage switched mode power supply applications where low conduction loss, fast switching times and uis capability are essential. smps ii lgc devices have been specially designed for: power factor correction (pfc) circuits full bridge topologies half bridge topologies push-pull circuits uninterruptible power supplies zero voltage and zero current switching circuits formerly developmental type ta49367. features >100khz operation at 390v,12a 200khz operation at 390v, 9a 600v switching soa capability typical fall time. . . . . . . . . . . . . . . . . .72ns at t j = 125 o c low gate charge . . . . . . . . . . . . . . . . .23nc at v ge = 15v uis rated . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .150mj low conduction loss symbol ordering information part number package brand isl9g1260eg3 to-247 g1260eg3 ISL9G1260EP3 to-220ab g1260ep3 isl9g1260es3 to-263ab g1260es3 note: when ordering, use the entire part number. add the suf? t to obtain the to-263ab variant in tape and reel, e.g., isl9g1260es3t. c e g packaging jedec style to-247 jedec to-220ab jedec to-263ab intersil corporation igbt product is covered by one or more of the following u.s. patents 4,364,073 4,417,385 4,430,792 4,443,931 4,466,176 4,516,143 4,532,534 4,587,713 4,598,461 4,605,948 4,620,211 4,631,564 4,639,754 4,639,762 4,641,162 4,644,637 4,682,195 4,684,413 4,694,313 4,717,679 4,743,952 4,783,690 4,794,432 4,801,986 4,803,533 4,809,045 4,809,047 4,810,665 4,823,176 4,837,606 4,860,080 4,883,767 4,888,627 4,890,143 4,901,127 4,904,609 4,933,740 4,963,951 4,969,027 collector (flange) c e g collector (flange) g e c collector (flange) g e data sheet january 2001 [ /title (isl9 g1260 eg3, isl9g 1260e p3, isl9g 1260e s3) /subjec t (600v, smps ii lgc series n- chann el igbt) /autho r () /keyw ords (intersi l corpor ation, semico nducto r, 600v, smps ii lgc series n- chann el igbt,
?001 fairchild semiconductor corporation isl9g1260eg3, ISL9G1260EP3, isl9g1260es3 rev. a absolute maximum ratings t c = 25 o c, unless otherwise speci?d all types units collector to emitter voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .bv ces 600 v collector current continuous at t c = 25 o c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i c25 50 a at t c = 110 o c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i c110 20 a collector current pulsed (note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i cm 108 a gate to emitter voltage continuous. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v ges 20 v gate to emitter voltage pulsed . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v gem 30 v switching safe operating area at t j = 150 o c, figure 2 . . . . . . . . . . . . . . . . . . . . . . . . ssoa 60a at 600v single pulse avalanche energy at t c = 25 o c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . e as 150mj at 12a singlle pulse reverse avalanche energy at t c = 25 o c . . . . . . . . . . . . . . . . . . . . . . . . . e arv 100mj at 12a power dissipation total at t c = 25 o c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . p d 167 w power dissipation derating t c > 25 o c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.33 w/ o c operating and storage junction temperature range . . . . . . . . . . . . . . . . . . . . . . . . t j , t stg -55 to 150 o c maximum lead temperature for soldering leads at 0.063in (1.6mm) from case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . t l package body for 10s, see tech brief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . t pkg 300 260 o c o c caution: stresses above those listed in ?bsolute maximum ratings may cause permanent damage to the device. this is a stress o nly rating and operation of the device at these or any other conditions above those indicated in the operational sections of this speci?ation is not implied. note: 1. pulse width limited by maximum junction temperature. electrical speci?ations t j = 25 o c, unless otherwise speci?d parameter symbol test conditions min typ max units collector to emitter breakdown voltage bv ces i c = 250 a, v ge = 0v 600 - - v emitter to collector breakdown voltage bv ecs i c = 10ma, v ge = 0v 15 - - v collector to emitter leakage current i ces v ce = 600v t j = 25 o c - - 100 a t j = 125 o c--2ma collector to emitter saturation voltage v ce(sat) i c =12a, v ge = 15v t j = 25 o c - 1.95 2.7 v t j = 125 o c - 1.7 2.0 v gate to emitter threshold voltage v ge(th) i c = 250 a, v ce = 600v 4.5 6.5 7.0 v gate to emitter leakage current i ges v ge = 20v - - 250 na switching soa ssoa t j = 150 o c, r g = 10 ?, v ge = 15v l = 100 h, v ce = 600v 60 - - a pulsed avalanche energy e as i ce = 12a, l = 2.1mh, v dd = 50v 150 - - mj gate to emitter plateau voltage v gep i c = 12a, v ce = 300v - 9.0 - v on-state gate charge q g(on) i c = 12a, v ce = 300v v ge = 15v - 23 30 nc v ge = 20v - 28 36 nc current turn-on delay time t d(on)i igbt and diode at t j = 25 o c i ce = 12a v ce = 390v v ge = 15v r g = 10 ? l = 200 h test circuit - figure 20 -16 - ns current rise time t ri -14 - ns current turn-off delay time t d(off)i -42 - ns current fall time t fi -18 - ns turn-on energy (note 2) e on1 -55 - j turn-on energy (note 2) e on2 - 170 - j turn-off energy (note 3) e off - 100 - j isl9g1260eg3, ISL9G1260EP3, isl9g1260es3
?001 fairchild semiconductor corporation isl9g1260eg3, ISL9G1260EP3, isl9g1260es3 rev. a current turn-on delay time t d(on)i igbt and diode at t j = 125 o c i ce = 12a v ce = 390v v ge = 15v r g = 10 ? l = 200 h test circuit - figure 20 -22 - ns current rise time t ri -15 - ns current turn-off delay time t d(off)i -80100ns current fall time t fi -7285ns turn-on energy (note 2) e on1 -55 - j turn-on energy (note 2) e on2 - 230 280 j turn-off energy (note 3) e off - 225 300 j thermal resistance junction to case r jc - - 0.75 o c/w notes: 2. values for two turn-on loss conditions are shown for the convenience of the circuit designer. e on1 is the turn-on loss of the igbt only. e on2 is the turn-on loss when a typical diode is used in the test circuit and the diode is at the same t j as the igbt. the diode type is specified in figure 20. 3. turn-off energy loss (e off ) is defined as the integral of the instantaneous power loss starting at the trailing edge of the input pulse and ending at the point where the collector current equals zero (i ce = 0a). all devices were tested per jedec standard no. 24-1 method for measurement of power device turn-off switching loss. this test method produces the true total turn-off energy loss. typical performance curves unless otherwise speci?d figure 1. dc collector current vs case temperature figure 2. minimum switching safe operating area figure 3. operating frequency vs collector to emitter current figure 4. short circuit withstand time electrical speci?ations t j = 25 o c, unless otherwise speci?d (continued) parameter symbol test conditions min typ max units t c , case temperature ( o c) i ce , dc collector current (a) 50 20 0 40 25 75 100 125 150 50 30 10 v ge = 15v t j = 150 o c v ce , collector to emitter voltage (v) 700 30 0 i ce , collector to emitter current (a) 300 400 200 100 500 600 0 60 10 70 20 50 40 t j = 150 o c, r g = 10 ? , v ge = 15v f max , operating frequency (khz) 1 i ce , collector to emitter current (a) 10 100 30 510 1000 t c 75 o c t j = 125 o c, r g = 10 ? , l = 200 h, v ce = 390v f max1 = 0.05 / (t d(off)i + t d(on)i ) r jc = 0.75 o c/w, see notes p c = conduction dissipation (duty factor = 50%) f max2 = (p d - p c ) / (e on2 + e off ) 20 v ge = 12v v ge = 15v v ge , gate to emitter voltage (v) i sc , peak short circuit current (a) t sc , short circuit withstand time ( s) 10 11 12 15 4 20 80 100 140 24 13 14 8 12 16 40 60 120 t sc i sc v ce = 390v, r g = 10 ? , t j = 125 o c isl9g1260eg3, ISL9G1260EP3, isl9g1260es3
?001 fairchild semiconductor corporation isl9g1260eg3, ISL9G1260EP3, isl9g1260es3 rev. a figure 5. collector to emitter on-state voltage figure 6. collector to emitter on-state voltage figure 7. turn-on energy loss vs collector to emitter current figure 8. turn-off energy loss vs collector to emitter current figure 9. turn-on delay time vs collector to emitter current figure 10. turn-on rise time vs collector to emitter current typical performance curves unless otherwise speci?d (continued) 0 1.0 v ce , collector to emitter voltage (v) i ce , collector to emitter current (a) 0 2 4 1.5 2.0 16 12 18 0.5 2.5 8 pulse duration = 250 s duty cycle < 0.5%, v ge = 12v t j = 125 o c t j = 25 o c t j = 150 o c 6 10 14 i ce , collector to emitter current (a) v ce , collector to emitter voltage (v) 0 2 4 16 14 18 12 0 1.0 1.5 2.0 0.5 2.5 6 10 8 duty cycle < 0.5%, v ge = 15v pulse duration = 250 s t j = 150 o c t j = 25 o c t j = 125 o c e on2 , turn-on energy loss ( j) 150 i ce , collector to emitter current (a) 100 350 0 4 2 6 8 101214 50 0 400 300 200 250 r g = 10 ? , v ce = 390v t j = 125 o c, v ge = 12v, v ge = 15v t j = 25 o c, v ge = 12v, v ge = 15v 175 i ce , collector to emitter current (a) e off , turn-off energy loss ( j) 0 50 200 75 250 275 125 4 2 6 8 101214 0 25 225 100 150 r g = 10 ? , v ce = 390v t j = 125 o c, v ge = 12v or 15v t j = 25 o c, v ge = 12v or 15v i ce , collector to emitter current (a) t d(on)i , turn-on delay time (ns) 10 22 24 16 14 4 2 6 8 101214 0 t j = 125 o c, v ge = 12v t j = 25 o c, v ge = 15v r g = 10 ? , v ce = 390v t j = 25 o c, v ge = 12v 20 18 12 t j = 125 o c, v ge = 15v 0 10 5 35 25 4 2 6 8 101214 0 15 20 30 i ce , collector to emitter current (a) t ri , rise time (ns) r g = 10 ? , v ce = 390v t j = 25 o c or t j = 125 o c, v ge = 12v t j = 25 o c or t j = 125 o c, v ge = 15v isl9g1260eg3, ISL9G1260EP3, isl9g1260es3
?001 fairchild semiconductor corporation isl9g1260eg3, ISL9G1260EP3, isl9g1260es3 rev. a figure 11. turn-off delay time vs collector to emitter current figure 12. fall time vs collector to emitter current figure 13. transfer characteristic figure 14. gate charge waveforms figure 15. total switching loss vs case temperature figure 16. total switching loss vs gate resistance typical performance curves unless otherwise speci?d (continued) 40 20 30 i ce , collector to emitter current (a) t d(off)i , turn-off delay time (ns) 90 60 80 50 4 2 6 8 101214 0 70 v ge = 12v, t j = 125 o c v ge = 15v, t j = 25 o c v ge = 12v, t j = 25 o c r g = 10 ? , v ce = 390v v ge = 15v, t j = 125 o c i ce , collector to emitter current (a) t fi , fall time (ns) 10 30 20 50 70 40 60 t j = 25 o c, v ge = 12v or 15v t j = 125 o c, v ge = 12v or 15v 48 2 6 12 16 14 10 18 20 22 24 80 90 r g = 10 ? , v ce = 390v i ce , collector to emitter current (a) 0 50 75 910 1213 16 v ge , gate to emitter voltage (v) 15 125 150 175 8 25 14 11 100 pulse duration = 250 s duty cycle < 0.5%, v ce = 10v 7 6 t j = -55 o c t j = 125 o c t j = 25 o c v ge , gate to emitter voltage (v) q g , gate charge (nc) 0 4 8 12 16 21416 12 18 20 22 24 0 14 10 6 2 46810 v ce = 400v v ce = 600v v ce = 200v i g(ref) = 1ma, r l = 25 ? , t j = 25 o c 0 0.2 0.4 50 75 100 t c , case temperature ( o c) 0.6 1.0 125 25 150 1.4 1.2 0.8 i ce = 24a i ce = 12a i ce = 6a e total = e on2 + e off r g = 10 ? , v ce = 390v e total , total switching energy loss (mj) 0.1 10 100 r g , gate resistance ( ? ) 1 10 3 1000 i ce = 24a i ce = 12a i ce = 6a t j = 125 o c, v ce = 390v, v ge = 15v e total = e on2 + e off e total , total switching energy loss (mj) isl9g1260eg3, ISL9G1260EP3, isl9g1260es3
?001 fairchild semiconductor corporation isl9g1260eg3, ISL9G1260EP3, isl9g1260es3 rev. a figure 17. capacitance vs collector to emitter voltage figure 18. collector to emitter on-state voltage vs gate to emitter voltage figure 19. igbt normalized transient thermal response, junction to case test circuit and waveforms figure 20. inductive switching test circuit figure 21. switching test waveforms typical performance curves unless otherwise speci?d (continued) v ce , collector to emitter voltage (v) c, capacitance (pf) c res 0 20406080100 0 200 400 800 1000 1400 600 c oes c ies frequency = 1mhz 1200 v ge , gate to emitter voltage (v) 1.9 10 12 2.0 2.2 2.1 11 13 14 15 16 2.3 2.4 v ce , collector to emitter voltage (v) 1.8 i ce = 6a i ce = 12a i ce = 18a duty cycle < 0.5%, v ge = 15v pulse duration = 250 s, t j = 25 o c t 1 , rectangular pulse duration (s) z jc , normalized thermal response 10 -2 10 -1 10 0 10 -5 10 -3 10 -2 10 -1 10 0 10 1 10 -4 t 1 t 2 p d duty factor, d = t 1 / t 2 peak t j = (p d x z jc x r jc ) + t c single pulse 0.1 0.2 0.5 0.05 0.01 0.02 r g = 10 ? l = 200 h v dd = 390v + - isl9h1260ep3 ISL9G1260EP3 t fi t d(off)i t ri t d(on)i 10% 90% 10% 90% v ce i ce v ge e off e on2 isl9g1260eg3, ISL9G1260EP3, isl9g1260es3
?001 fairchild semiconductor corporation isl9g1260eg3, ISL9G1260EP3, isl9g1260es3 rev. a handling precautions for igbts insulated gate bipolar transistors are susceptible to gate-insulation damage by the electrostatic discharge of energy through the devices. when handling these devices, care should be exercised to assure that the static charge built in the handlers body capacitance is not discharged through the device. with proper handling and application procedures, however, igbts are currently being extensively used in production by numerous equipment manufacturers in military, industrial and consumer applications, with virtually no damage problems due to electrostatic discharge. igbts can be handled safely if the following basic precautions are taken: 1. prior to assembly into a circuit, all leads should be kept shorted together either by the use of metal shorting springs or by the insertion into conductive material such as ?ccosorbd ld26 or equivalent. 2. when devices are removed by hand from their carriers, the hand being used should be grounded by any suitable means - for example, with a metallic wristband. 3. tips of soldering irons should be grounded. 4. devices should never be inserted into or removed from circuits with power on. 5. gate voltage rating - never exceed the gate-voltage rating of v gem . exceeding the rated v ge can result in permanent damage to the oxide layer in the gate region. 6. gate termination - the gates of these devices are essentially capacitors. circuits that leave the gate open-circuited or ?ating should be avoided. these conditions can result in turn-on of the device due to voltage buildup on the input capacitor due to leakage currents or pickup. 7. gate protection - these devices do not have an internal monolithic zener diode from gate to emitter. if gate protection is required an external zener is recommended. operating frequency information operating frequency information for a typical device (figure 3) is presented as a guide for estimating device performance for a speci? application. other typical frequency vs collector current (i ce ) plots are possible using the information shown for a typical unit in figures 5, 6, 7, 8, 9 and 11. the operating frequency plot (figure 3) of a typical device shows f max1 or f max2 ; whichever is smaller at each point. the information is based on measurements of a typical device and is bounded by the maximum rated junction temperature. f max1 is de?ed by f max1 = 0.05/(t d(off)i + t d(on)i ). deadtime (the denominator) has been arbitrarily held to 10% of the on-state time for a 50% duty factor. other de?itions are possible. t d(off)i and t d(on)i are de?ed in figure 21. device turn-off delay can establish an additional frequency limiting condition for an application other than t jm . f max2 is de?ed by f max2 = (p d - p c )/(e off + e on2 ). the allowable dissipation (p d ) is de?ed by p d = (t jm - t c )/r jc . the sum of device switching and conduction losses must not exceed p d . a 50% duty factor was used (figure 3) and the conduction losses (p c ) are approximated by p c = (v ce x i ce )/2. e on2 and e off are de?ed in the switching waveforms shown in figure 21. e on2 is the integral of the instantaneous power loss (i ce x v ce ) during turn-on and e off is the integral of the instantaneous power loss (i ce x v ce ) during turn-off. all tail losses are included in the calculation for e off ; i.e., the collector current equals zero (i ce = 0). isl9g1260eg3, ISL9G1260EP3, isl9g1260es3
?001 fairchild semiconductor corporation isl9g1260eg3, ISL9G1260EP3, isl9g1260es3 rev. a isl9g1260eg3, ISL9G1260EP3, isl9g1260es3 to-247 3 lead jedec style to-247 plastic package a b b 1 c d e l l 1 r 1 2 e 1 3 1 j 1 s q p back view term. 4 3 e b 2 2 symbol inches millimeters notes min max min max a 0.180 0.190 4.58 4.82 - b 0.046 0.051 1.17 1.29 2, 3 b 1 0.060 0.070 1.53 1.77 1, 2 b 2 0.095 0.105 2.42 2.66 1, 2 c 0.020 0.026 0.51 0.66 1, 2, 3 d 0.800 0.820 20.32 20.82 - e 0.605 0.625 15.37 15.87 - e 0.219 typ 5.56 typ 4 e 1 0.438 bsc 11.12 bsc 4 j 1 0.090 0.105 2.29 2.66 5 l 0.620 0.640 15.75 16.25 - l 1 0.145 0.155 3.69 3.93 1 p 0.138 0.144 3.51 3.65 - q 0.210 0.220 5.34 5.58 - r 0.195 0.205 4.96 5.20 - s 0.260 0.270 6.61 6.85 - notes: 1. lead dimension and ?ish uncontrolled in l 1 . 2. lead dimension (without solder). 3. add typically 0.002 inches (0.05mm) for solder coating. 4. position of lead to be measured 0.250 inches (6.35mm) from bottom of dimension d. 5. position of lead to be measured 0.100 inches (2.54mm) from bottom of dimension d. 6. controlling dimension: inch. 7. revision 1 dated 1-93.
?001 fairchild semiconductor corporation isl9g1260eg3, ISL9G1260EP3, isl9g1260es3 rev. a isl9g1260eg3, ISL9G1260EP3, isl9g1260es3 to-263ab surface mount jedec to-263ab plastic package to-263ab 24mm tape and reel minimum pad size recommended for surface-mounted applications e a 1 a h 1 d l b e e1 l 2 b 1 l 1 c term. 4 13 1 3 l 3 b 2 term. 4 0.450 0.350 0.150 (3.81) 0.080 typ (2.03) 0.700 (11.43) (8.89) (17.78) 0.062 typ (1.58) j 1 symbol inches millimeters notes min max min max a 0.170 0.180 4.32 4.57 - a 1 0.048 0.052 1.22 1.32 4, 5 b 0.030 0.034 0.77 0.86 4, 5 b 1 0.045 0.055 1.15 1.39 4, 5 b 2 0.310 - 7.88 - 2 c 0.018 0.022 0.46 0.55 4, 5 d 0.405 0.425 10.29 10.79 - e 0.395 0.405 10.04 10.28 - e 0.100 typ 2.54 typ 7 e 1 0.200 bsc 5.08 bsc 7 h 1 0.045 0.055 1.15 1.39 - j 1 0.095 0.105 2.42 2.66 - l 0.175 0.195 4.45 4.95 - l 1 0.090 0.110 2.29 2.79 4, 6 l 2 0.050 0.070 1.27 1.77 3 l 3 0.315 - 8.01 - 2 notes: 1. these dimensions are within allowable dimensions of rev. c of jedec to-263ab outline dated 2-92. 2. l 3 and b 2 dimensions established a minimum mounting surface for terminal 4. 3. solder finish uncontrolled in this area. 4. dimension (without solder). 5. add typically 0.002 inches (0.05mm) for solder plating. 6. l 1 is the terminal length for soldering. 7. position of lead to be measured 0.120 inches (3.05mm) from bottom of dimension d. 8. controlling dimension: inch. 9. revision 10 dated 5-99. 2.0mm 4.0mm 1.75mm 1.5mm dia. hole c l user direction of feed 16mm 24mm 330mm 100mm 13mm 30.4mm 24.4mm cover tape general information 1. 800 pieces per reel. 2. order in multiples of full reels only. 3. meets eia-481 revision "a" specifications. access hole 40mm min.
?001 fairchild semiconductor corporation isl9g1260eg3, ISL9G1260EP3, isl9g1260es3 rev. a isl9g1260eg3, ISL9G1260EP3, isl9g1260es3 to-220ab 3 lead jedec to-220ab plastic package e p q d h 1 e 1 l l 1 60 o b 1 b 1 2 3 e e 1 a c j 1 45 o d 1 a 1 term. 4 symbol inches millimeters notes min max min max a 0.170 0.180 4.32 4.57 - a 1 0.048 0.052 1.22 1.32 - b 0.030 0.034 0.77 0.86 3, 4 b 1 0.045 0.055 1.15 1.39 2, 3 c 0.014 0.019 0.36 0.48 2, 3, 4 d 0.590 0.610 14.99 15.49 - d 1 - 0.160 - 4.06 - e 0.395 0.410 10.04 10.41 - e 1 - 0.030 - 0.76 - e 0.100 typ 2.54 typ 5 e 1 0.200 bsc 5.08 bsc 5 h 1 0.235 0.255 5.97 6.47 - j 1 0.100 0.110 2.54 2.79 6 l 0.530 0.550 13.47 13.97 - l 1 0.130 0.150 3.31 3.81 2 p 0.149 0.153 3.79 3.88 - q 0.102 0.112 2.60 2.84 - notes: 1. these dimensions are within allowable dimensions of rev. j of jedec to-220ab outline dated 3-24-87. 2. lead dimension and finish uncontrolled in l 1 . 3. lead dimension (without solder). 4. add typically 0.002 inches (0.05mm) for solder coating. 5. position of lead to be measured 0.250 inches (6.35mm) from bot- tom of dimension d. 6. position of lead to be measured 0.100 inches (2.54mm) from bot- tom of dimension d. 7. controlling dimension: inch. 8. revision 2 dated 7-97.
trademarks the following are registered and unregistered trademarks fairchild semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. life support policy fairchild?s products are not authorized for use as critical components in life support devices or systems without the express written approval of fairchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. a critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. product status definitions definition of terms datasheet identification product status definition advance information preliminary no identification needed obsolete this datasheet contains the design specifications for product development. specifications may change in any manner without notice. this datasheet contains preliminary data, and supplementary data will be published at a later date. fairchild semiconductor reserves the right to make changes at any time without notice in order to improve design. this datasheet contains final specifications. fairchild semiconductor reserves the right to make changes at any time without notice in order to improve design. this datasheet contains specifications on a product that has been discontinued by fairchild semiconductor. the datasheet is printed for reference information only. formative or in design first production full production not in production disclaimer fairchild semiconductor reserves the right to make changes without further notice to any products herein to improve reliability, function or design. fairchild does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights, nor the rights of others. pacman? pop? powertrench qfet? qs? qt optoelectronics? quiet series? silent switcher smart start? star* power? stealth? fast fastr? globaloptoisolator? gto? hisec? isoplanar? littlefet? microfet? microwire? optologic? optoplanar? rev. h1 ? acex? bottomless? coolfet? crossvolt ? densetrench? dome? ecospark? e 2 cmos tm ensigna tm fact? fact quiet series? supersot?-3 supersot?-6 supersot?-8 syncfet? tinylogic? uhc? ultrafet vcx? ? ? ?

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